Posted by Damir [ 213.202.97.56 ] on October 30, 2005 at 05:05:51:
In Fig. 1 we can see the «typical» SE DHT output stage. The purpose of pot, P1 (50 Ohms/2W typical) is to provide the way to «nulling» the hum.
In Fig. 2 a,b,c, we can see other ways of connecting the filaments to cathode resistor Rk. We want potentiometer, to have some AC hum control, `cos we`ll use «traditional» 5V AC heating. I doesn`t have a multi-turn (precision) 50 Ohms/2W pot, and I used the circuit on Fig. 2c. It has some advantage that current flows mostly through R1 and R2, and not through (possible problematic) center-wiper contact. We have «fine» adjustment, Fig. 2d.
Now we can calculate the cathode resistor. With Uak = 350V and Ia=Ik=80mA, we have about Ugk= -70V. Then, by Ohm`s Law:
Rk = Uk / Ik = 70 / 0,08 = 875 Ohms. Not a standard value, but we can use the combination, I used 820 Ohms/25W Al-clad chasis mounted resistor and 56 Ohms/1W in a series. If necessary, lower value = higher current, and opposite.
Dissipation in Rk is Prk = Ik^2*Rk = Uk*Ik = Uk^2*Ik = 5,6W – we must use at least 10W resistor here.
Calculating the cathode bypass capacitor Ck: We want Ck to «bypass» all AC frequencies of interest, intuitively – we need f-3dB at about 1-2 Hz. But:
- Power bandwidth f-3dB of our OPT is about 20Hz, and there is not much sense in amplifying the subsonic frequencies that can saturate the core
- We need not too large RC time constant here – quick bias «recovering» from overloads
- For say, 2Hz –3dB high pass frequency we`d need large and expensive film cap, or electrolitic (hmmm…)
Then, I choose low-cut frequency around 5-10 Hz. Let`s see:
Our Ck «see» the cathode impedance Zk=(rp+Ra)/(µ+1) in parallel with cathode resistor Rk, or Rcath = Zk // Rk. The formula for
Ck = 1/(2Pi*f*Rcath), and when we put those equations together, we get the final formula for cathode capacitor:
Ck =[(µ+1)/(rp+Ra) + 1/Rk] / 2Pi*f, or obviously f-3dB is:
f-3 = [(µ+1)/(rp+Ra)+1/Rk] / 2Pi*Ck
When we put some numbers in it, and use the standard 47µF/100V MKP cap here, we get f-3dB about 8,4 Hz:
f-3 = [(3,85+1)/(650+3000)+1/875]/2*3,141*47*10^-6 = 8,4 Hz
Note that we use Ra=3000 Ohms, like constant resistance value, but our OPT is far from that, we neglected Lp, Rw, etc. But, possible mistake is small, and can be neglected for our purposes.
The quality of Ck is critical, and it`s recomended that we use quality film cap here.
And not just that, see Fig. 3 – SE stage «redrawn» to include PS capacitor(s). We can see that both Ck and Cps are inside the output signal current loop, and that both caps are practically in a series. Then, quality of Cps is also critical, and it can also be MKP or MKV types.
In Fig. 4 we can see the final SE stage, with all the values. I choose the «safe» value for grid-stop resistor Rgs=1k, non-inductive type (say, carbon-comp), mounted close to the tube pin. For grid resistor Rg, we need small value from the output tube standpoint, and large value from the driver tube standpoint. Some people put grid-choke here (rel. small DC resistance and large AC impedance), but we`ll use «standard» 220k here, somewhat smaller then max. recommended 250k from 300B data.
I choose 0,22µF for coupling capacitor Ci (between the driver tube and output stage). We have the first order high-pass filter here, 6dB/octave. Again, we need «low enough» -3dB high pass point, but not too large RC time constant, because of possible «blocking» effect. Again, the quality of this capacitor is critical. Combination of 220k/0,22µ gives:
f-3 = 1/(2Pi*Rg*Ci) == 1/(2*3,141*220000*0,22*10^-6) = 3,3 Hz.
The formula for Ci=1/(2Pi*f*Rg), obviously :-).
We have another «unpleasant» effect with our output stage, the input capacitance: Cin = Cmiller+Cgf+Cstrays = (A+1)*Cag + Cgf + Cstr.
From Parts 1&2 we know that amplification of our output stage is output AC signal swing divided with input AC signal swing, or A=Ua/Ugk = 3.
Then we have: Cin = (3+1)*15 + 9 + 11 = 80pF. Values for Cga and Cgf we have in 300B data, and value for Cstr we estimated. Now, with 80pF of input capacitance and at least 100kHz driver bandwith, our output resistance Rout from the driver can be the maximum
Rout = 1/(2Pi*f*Cin) = 1/(2*3,141*100000*80*10^-12) = 19,9kOhms.
Although for «driving» Zcin = 1 / 2*Pi*f*Cin = 99,5 kOhms on 20 kHz with full input signal of 49,5Vrms requires just I=Ugk/Zcin= 0,5mA of AC driver signal current, we need driver that «works» with at least a few times that current, to avoid so called «slewing» distortion.
In Fig. 5 we can see the possible wiring of our output stage. Ck can`t be too close to the hot Rk.
Of course, the designing methods here are «shortened» and simplified, and some designing choices are subjective. But, I hope that DIY-ers can have some «basis» in above, for understanding and experimenting with SE stages… 
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